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| 8/30 Introduction; Data representations Reading: Ch. 1, Ch 2.4, Ch. 3.1-.3.2 3.5 slides: Lecture 1 |
9/1 Data Representation Reading Ch. 1, Ch 2.4, Ch. 3.1-.3.2 3.5 slides: Lecture 2 |
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| 9/6 Data Representations; Reading Ch. 1, Ch 2.4, Ch. 3.1-.3.2 3.5 slides: Lecture 3 |
9/8 Memory; Data structures; Bitwise Ops; ISA Reading Ch. 1, Ch 2.4, Ch. 3.1-.3.2 3.5 slides: Lecture 4 |
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| 9/13 Data structures; Bitwise Ops; ISA slides: Lecture 5 |
9/15 Instruction Set Architecture; MIPS 2000 ISA; Ch. 2, Appendix B slides: Lecture 6 |
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| 9/20 MIPS 2000 ISA; Assembly programming; Ch. 2, Appendix B slides: Lecture 7 |
9/22
Assembly programming; The SPIM simulator Appendix B, Ch. 2 slides: Lecture 8 |
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| 9/27 Mips Assembler; Appendix B, Ch. 2 slides: Lecture 9 |
9/29
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| 10/4 Functions and Methods: Appendix C Ch. 4 slides: Lecture 11 |
10/6 Midterm Exam |
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| 10/11 Fall Break |
10/13 Functions and Methods: Appendix B, Ch, 2 Slides: Lecture 12 |
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| 10/18
Basic Logic design, Logic Gates Appendix C Ch. 4 slides: Lecture 13 |
10/20 Basic Logic design, Logic Gates, digital Circuits Ch 5. slides: Lecture 14 |
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| 10/25
The ALU, Memory Elements,Datapath Elements Ch. 5.4 Slides: Lecture 15 |
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| 11/1
Datapath & Control for a single cycle processor; Ch.5 Slides: Lecture 17 |
11/3 Datapath & Control Ch. 5 Slides: Lecture 18 |
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| 11/8 The Memory System Ch. 5 Slides: Lecture 19 |
11/10
Cache Memory Ch. 5 Slides: Lecture 20 |
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11/15 |
11/17
Cache Performance; Virtual Memory Ch. 5 Slides: Lecture 22 |
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| 11/22 Virtual Memory; Ch. 5, Slides: Lecture 23 |
11/24 Thanksgiving Break |
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| 11/29 Virtual Memory Ch. 5 slides: Lecture 24 |
12/1 The I/O System Ch. 6, slides: Lecture 25 |
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| 12/6 The I/O System ; Iterrupts & Exceptions slides: Lecture 26 |
12/8 Q&A on Computer Architecture slides: |
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| 12/6 Pipeline Processors |
12/8
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