| Monday | Wednesday |
| 8/24 Introduction; Data representations Reading: Ch. 1, Ch 2.4, Ch. 3.1-.3.2 3.5 slides: Lecture 1 |
8/26 Data Representation Reading Ch. 1, Ch 2.4, Ch. 3.1-.3.2 3.5 slides: Lecture 2 |
| 8/31 Data Representations; Reading Ch. 1, Ch 2.4, Ch. 3.1-.3.2 3.5 slides: Lecture 3 |
9/2 Memory; Data structures; Bitwise Ops; ISA Reading Ch. 1, Ch 2.4, Ch. 3.1-.3.2 3.5 slides: Lecture 4 |
| 9/7 Data structures; Bitwise Ops; ISA slides: Lecture 5 |
9/9 Instruction Set Architecture; MIPS 2000 ISA; Ch. 2, Appendix B slides: Lecture 6 |
| 9/14 MIPS 2000 ISA; Assembly programming; Ch. 2, Appendix B slides: Lecture 7 |
9/16
Assembly programming; The SPIM simulator Appendix B, Ch. 2 slides: Lecture 8 |
| 9/21 Mips Assembler; Appendix B, Ch. 2 slides: Lecture 9 |
9/23
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| 9/28 Functions and Methods: Appendix C Ch. 4 slides: Lecture 11 |
9/30 Functions and Methods; Review Appendix C, Ch. 4 Slides: Lecture 12 |
| 10/5 Fall Break |
10/7 Midterm Exam |
| 10/12 Basic Logic design Appendix C, Ch, 4 Slides: Lecture 13 |
10/14 Logic Gates ; Appendix C Ch. 4 slides: Lecture 14 |
| 10/19
The ALU, Memory Elements,Datapath Elements Ch 5. slides: Lecture 15 |
10/21 Memory Elements; A Single cycle data path Ch.5.4 Slides: Lecture 16 |
| 10/26
Datapath & Control for a single cycle processor; Ch. 5 Slides: Lecture 17 |
10/28
Datapath & Control Ch.5 Slides: Lecture 18 |
| 11/2 The Memory System Ch. 5 Slides: Lecture 19 |
11/4
Cache Memory Ch. 5 Slides: Lecture 20 |
|
11/9 |
11/11
Cache Performance; Virtual Memory Ch. 5 Slides: Lecture 22 |
| 11/16 Virtual Memory; Ch. 5 Slides: Lecture 23 |
11/18 Virtual Memory Input/Output Ch. 5, 6 Slides: Lecture 24 |
| 11/23 The I/O System Ch. 6 slides: Lecture 25 |
11/26 Thanksgiving Break |
| 11/30
The I/O System ; Iterrupts & Exceptions Ch. 6, slides: Lecture 26 |
12/2
Q&A on Computer Architecture |