Design and Evaluation of a Distributed Cache Architecture
with Prediction
Thomas Alexander and Gershon Kedem
abstract
We propose a secondary cache architecture that combines a predictive
fetch strategy with a distributed cache to build a high performance memory
system. The cache is partitioned into smaller units and distributed evenly in
the main memory space. The architecture offers high bandwidth
between the cache and the DRAM memory. A hardware prediction scheme
is used to prefetch data into the cache and hide the high DRAM
latency. The prediction scheme does not rely on any predetermined data access
patterns and is completely transparent to the user.
Simulation of our architecture on a set of benchmark programs showed a
40%-90% improvement in the effective memory access time when
compared to traditional caching.
On-line project information
Introductory Slides
Thomas Alexander and Gershon Kedem, "Distributed Prefetch-buffer/Cache
Design for High Performance Memory
System." Procedings HPCA-2. pp. 254-263, Feb. 1996.
compressed postscript format
and PDF format.
HPCA-2 presentation slides.
Thomas Alexander, "A Distributed Predictive Cache for High Performance
Computer System", PhD Thesis, Duke University, 1995.
compressed postscript format and PDF
format. (big)